1 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com hi-reliability product WF8M32-XG4DX5 october 1999 rev. 3 8mx32 5v flash module advanced* features n access time of 100, 120, 150ns n packaging: ? 68 lead, 40 mm (1.560") square hermetic cqfp, 5.2 mm (0.205") high (package 503) n sector architecture ? 32 equal size sectors of 64kbytes per each 2mx8 chip ? any combination of sectors can be erased. also supports full chip erase. n 100,000 write/erase cycles minimum n organized as 8mx32 n commercial, industrial, and military temperature ranges n 5 volt read and write. 5v 10% supply. n low power cmos n data polling and toggle bit feature for detection of program or erase cycle completion. n supports reading or programming data to a sector not being erased. n reset pin resets internal state machine to the read mode. (not available in hip package for wf2m32-xhx5) n built-in decoupling caps and multiple ground pins for low noise operation, seperate power and ground planes to improve noise immunity. n built in buffering. * this data sheet describes a product that may or may not be under development, and is subject to change or cancellation without notice. note: for programming information refer to flash programming 16m5 application note. pin description fig. 1 pin configuration for WF8M32-XG4DX5 i/o 0-31 data inputs/outputs a 0-22 address inputs we write enable cs 1-4 chip selects oe output enable v cc power supply reset reset gnd ground nc not connected 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 i/o 0 i/o 1 i/o 2 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 gnd i/o 8 i/o 9 i/o 10 i/o 11 i/o 12 i/o 13 i/o 14 i/o 15 v cc a 11 a 12 a 13 a 14 a 15 a 16 cs 2 oe cs 4 a 17 a 18 a 19 a 20 a21 reset a22 i/o 16 i/o 17 i/o 18 i/o 19 i/o 20 i/o 21 i/o 22 i/o 23 gnd i/o 24 i/o 25 i/o 26 i/o 27 i/o 28 i/o 29 i/o 30 i/o 31 nc a 0 a 1 a 2 a 3 a 4 a 5 cs 1 gnd cs 3 we a 6 a 7 a 8 a 9 a 10 v cc block diagram top view 2m x 8 oe we 2m x 8 2m x 8 2m x 8 2m x 8 2m x 8 2m x 8 reset 2m x 8 2m x 8 2m x 8 2m x 8 2m x 8 2m x 8 2m x 8 2m x 8 2m x 8 i/o 0-31 interface 1 4 1 1 23 1 4 1 1 23 a 0-22 cs 1-4 cs 1 8 i/o 0-7 8 i/o 8-15 8 i/o 16-23 8 i/o 24-31 cs 2 cs 3 cs 4 32 cs 1 selects i/o 0-7 , cs 2 selects i/o 8-15 , cs 3 selects i/o 16-23 , cs 4 selects i/o 24-31
2 white electronic designs corporation ? phoenix, az ? (602) 437-1520 WF8M32-XG4DX5 parameter symbol conditions max unit oe capacitance c oe v in = 0 v, f = 1.0 mhz 20 pf we capacitance c we v in = 0 v, f = 1.0 mhz 20 pf cs 1-4 capacitance c cs v in = 0 v, f = 1.0 mhz 20 pf data i/o capacitance c i/o v i/o = 0 v, f = 1.0 mhz 60 pf address input capacitance c ad v in = 0 v, f = 1.0 mhz 20 pf reset capacitance c rst v in = o v, f = 1.0 mhz 20 pf this parameter is guaranteed by design but not tested. absolute maximum ratings parameter symbol ratings unit voltage on any pin relative to v ss v t -2.0 to +7.0 v power dissipation p t 8w storage temperature tstg -65 to +125 c short circuit output current i os 100 ma endurance - write/erase cycles 100,000 min cycles (mil temp) data retention (mil temp) 20 years recommended dc operating conditions parameter symbol min typ max unit supply voltage v cc 4.5 5.0 5.5 v ground v ss 00 0v input high voltage v ih 2.0 - v cc + 0.5 v input low voltage v il -0.5 - +0.8 v operating temperature (mil.) t a -55 - +125 c operating temperature (ind.) t a -40 - +85 c dc characteristics - cmos compatible (v cc = 5.0v, v ss = 0v, t a = -55 c to +125 c) notes: 1. the icc current listed includes both the dc operating current and the frequency dependent component (@ 5mhz). the frequency c omponent typically is less than 2ma/mhz, with oe at v ih . 2. icc active while embedded algorithm (program or erase) is in progress. 3. dc test conditions v il = 0.3v, v ih = v cc - 0.3v parameter symbol conditions min max unit input leakage current i li v cc = 5.5, v in = gnd to v cc 10 m a output leakage current i lox32 v cc = 5.5, v in = gnd to v cc 10 m a v cc active current for read (1) i cc1 cs = v il , oe = v ih , f = 5mhz 640 ma v cc active current for program or erase (2) i cc2 cs = v il , oe = v ih 960 ma v cc standby current i cc3 v cc = 5.5, cs = v ih , f = 5mhz, reset = vcc 0.3v 160 ma output low voltage v ol i ol = 12.0 ma, v cc = 4.5 0.45 v output high voltage v oh i oh = -2.5 ma, v cc = 4.5 0.85 x v vcc low v cc lock-out voltage v lko 3.2 4.2 v capacitance (t a = +25 c)
3 white electronic designs corporation ? phoenix, az ? (602) 437-1520 WF8M32-XG4DX5 ac characteristics C write/erase/program operations - we controlled (v cc = 5.0v, t a = -55 c to +125 c) parameter symbol -100 -120 -150 unit min max min max min max write cycle time t avav t wc 100 120 150 ns chip select setup time t elwl t cs 000ns write enable pulse width t wlwh t wp 50 50 50 ns address setup time t avwl t as 000ns data setup time t dvwh t ds 50 50 50 ns data hold time t whdx t dh 000ns address hold time t wlax t ah 50 50 50 ns write enable pulse width high t whwl t wph 20 20 20 ns duration of byte programming operation (1) t whwh1 300 300 300 m s sector erase (2) t whwh2 15 15 15 sec read recovery time before write t gh w l 000 m s v cc setup time t vcs 50 50 50 m s chip programming time 44 44 44 sec chip erase time (3) 256 256 256 sec output enable hold time (4) t oeh 10 10 10 ns reset pulse width t rp 500 500 500 ns notes: 1. typical value for t whwh1 is 7 m s. 2. typical value for t whwh2 is 1sec. 3. typical value for chip erase time is 32sec. 4. for toggle and data polling. ac characteristics C read-only operations (v cc = 5.0v, t a = -55 c to +125 c) parameter symbol -100 -120 -150 unit min max min max min max read cycle time t avav t rc 100 120 150 ns address access time t avqv t acc 100 120 150 ns chip select access time t elqv t ce 100 120 150 ns output enable to output valid t glqv t oe 50 50 55 ns chip select high to output high z (1) t ehqz t df 30 30 35 ns output enable high to output high z (1) t ghqz t df 30 30 35 ns output hold from addresses, cs or oe change, t axqx t oh 000ns whichever is first rst low to read mode (1) t ready 20 20 20 m s 1. guaranteed by design, not tested.
4 white electronic designs corporation ? phoenix, az ? (602) 437-1520 WF8M32-XG4DX5 cs we ry/by reset t rp the rising edge of the last we signal entire programming or erase operations t ready t busy ac characteristics C write/erase/program operations,cs controlled (v cc = 5.0v, v ss = 0v, t a = -55 c to +125 c) fig. 2 ac test circuit ac test conditions notes: v z is programmable from -2v to +7v. i ol & i oh programmable from 0 to 16ma. tester impedance z 0 = 75 w . v z is typically the midpoint of v oh and v ol . i ol & i oh are adjusted to simulate a typical resistive load circuit. ate tester includes jig capacitance. parameter typ unit input pulse levels v il = 0, v ih = 3.0 v input rise and fall 5 ns input and output reference level 1.5 v output timing reference level 1.5 v i current source d.u.t. c = 50 pf eff i ol v 1.5v (bipolar supply) z current source oh parameter symbol -100 -120 -150 unit min max min max min max write cycle time t avav t wc 100 120 150 ns write enable setup time t wlel t ws 000ns chip select pulse width t eleh t cp 50 50 50 ns address setup time t avel t as 000ns data setup time t dveh t ds 50 50 50 ns data hold time t ehdx t dh 000ns address hold time t elax t ah 50 50 50 ns chip select pulse width high t ehel t cph 20 20 20 ns duration of byte programming operation (1) t whwh1 300 300 300 m s sector erase time (2) t whwh2 15 15 15 sec read recovery time t ghel 000 m s chip programming time 100 100 100 sec chip erase time (3) 480 480 480 sec output enable hold time (4) t oeh 10 10 10 ns notes: 1. typical value for t whwh1 is 7 m s. 2. typical value for t whwh2 is 1sec. 3. typical value for chip erase time is 32sec. 4. for toggle and data polling. fig. 3 reset timing diagram
5 white electronic designs corporation ? phoenix, az ? (602) 437-1520 WF8M32-XG4DX5 fig. 4 ac waveforms for read operations addresses cs oe we outputs high z addresses stable t oe t rc output valid t ce t acc t oh high z t df
6 white electronic designs corporation ? phoenix, az ? (602) 437-1520 WF8M32-XG4DX5 notes: 1. pa is the address of the memory location to be programmed. 2. pd is the data to be programmed at byte address. 3. d 7 is the output of the complement of the data written to each chip. 4. d out is the output of the data written to the device. 5. figure indicates last two bus cycles of four bus cycle sequence. fig. 5 write/erase/program operation, we controlled addresses cs oe we data 5.0 v 5555h pa pa t wc t cs pd d 7 d out t ah t wph t dh t ds data polling t as t rc t wp a0h t oe t df t oh t ce t ghwl t whwh1
7 white electronic designs corporation ? phoenix, az ? (602) 437-1520 WF8M32-XG4DX5 fig. 6 ac waveforms chip/sector erase operations note: 1. sa is the sector address for sector erase. addresses cs oe we data v cc 5555h 2aaah 2aaah sa 5555h 5555h t wp t cs t vcs 10h/30h 55h 80h 55h aah aah t ah t ghwl t wph t dh t ds t as
8 white electronic designs corporation ? phoenix, az ? (602) 437-1520 WF8M32-XG4DX5 fig. 7 ac waveforms for data polling during embedded algorithm operations cs oe we t oe t ce t ch t oh d7 d7 = valid data high z d0-d6 = invalid d0-d7 valid data t df d7 d0-d6 t oeh t whwh 1 or 2 data
9 white electronic designs corporation ? phoenix, az ? (602) 437-1520 WF8M32-XG4DX5 notes: 1. pa represents the address of the memory location to be programmed. 2. pd represents the data to be programmed at byte address. 3. d 7 is the output of the complement of the data written to each chip. 4. d out is the output of the data written to the device. 5. figure indicates the last two bus cycles of a four bus cycle sequence. addresses we oe cs data 5.0 v 5555h pa pa t wc t ws pd d 7 d out t ah t cph t cp t dh t ds data polling t as t ghel a0h t whwh1 fig. 8 alternate cs controlled programming operation timings
10 white electronic designs corporation ? phoenix, az ? (602) 437-1520 WF8M32-XG4DX5 package 503: 68 lead, ceramic quad flat pack dual cavity, cqfp (g4d) 5.2 (0.205) max 1.27 (0.050) 0.1 (0.005) 0.010 + 0.002 - 0.001 0.38 (0.015) 0.08 (0.003) 68 places 1.27 (0.050) typ 39.6 (1.56) 0.38 (0.015) sq 38 (1.50) typ 4 places 5.1 (0.200) 0.25 (0.010) 4 places 12.7 (0.500) 0.5 (0.020) 4 places pin 1 identifier pin 1 all linear dimensions are millimeters and parenthetically in inches ordering information v pp programming voltage 5 = 5 v device grade: m = military screened -55 c to +125 c i = industrial -40 c to +85 c c = commercial 0 c to +70 c package type: g4d = 40mm cqfp (package 503) access time (ns) organization, 8m x 32 user configurable as 16m x 16 or 32m x 8 flash white electronic designs corp. w f 8m32 - xxx g4d x 5
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